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EDNE MAY 2014

Stefan Hörth, Häuserman GmbH Printed circuit board technologies updated for inteligent power systems Migration of electric power generation to the periphery of the grid is presenting new challenges for load balancing and synchronisation. The continuing need for greater efficiency in electric power utilisation and control also means that control systems are in the process of migrating towards individual loads. As a result, greater intelligence is required throughout the grid, from point of power generation to point of power consumption. And the combination of power and intelligence is presenting both challenges and opportunities to the electronics designer: challenges because small, cost-effective intelligent power management modules need to combine digital logic with mains power, and opportunity because new and innovative board level technologies exist to match this challenge. The Problem AC power management involves three basic functions; current sensing / measurement, phase detection / synchronisation, and switching. The classic electric power meter uses toroidal transformers and discrete conductors as shown in Figure A. In addition to the added complexity in BOM (bill of materials) these represent, providing the current sensing function involves assembly of a number of discrete elements, adding both cost and physical bulk. Therefore designers are looking for alternatives within a more highly integrated system. Although printed wiring offers an alternative in the same way as circuit boards replaced discrete wiring in the 1950s, the problem is that the mains load current must transit the assembly requiring a much larger conductor cross-section than is standard with printed circuit processes. "Thick copper" technologies are available, but these are generally accompanied by severe design limitations due to etching undercut and the difficulties of encapsulating the copper. Therefore, in the event logic functions are necessary, the logic circuitry has to be wired using thinner (1/2 oz or 1 oz) copper on a daughtercard. In addition to this disadvantage, according to models based on the IPC 2152 charts a board built Figure B. Power semiconductor packaging evolution with 420 μm thick copper would have to be designed with conductors almost 14 mm wide on the innerlayers to manage 90A RT within a 40°C temperature rise: and all conductors on that layer would be 420 μm thick unless additional processing was used to reduce copper thickness. In comparison, HSMtec solves the same problem using a single 0.5 mm x 12 mm copper strip while all non-power circuitry uses standard 1/2 - 2 oz copper. Current flow through a conductor causes resistive power losses (I2R) in the form of heat, and at high current levels the temperature increase becomes a factor in determining ampacity ampere capacity because the resistivity of the conductor changes with temperature. The relationship is linear, i.e. resistivity increases proportional to the change in temperature at a rate determined by the temperature coefficient of the conductor: (1) RT = RT0 × (1 + α (T - T0) where: T = temperature at which resistivity is measured T0 = reference temperature (ambient) α = linear temperature coefficient (copper = 0.004) = resistivity at measurement temperature RT0 = resistivity at reference temperature For a copper conductor, every 25°C increase in temperature means a drop of about 5% in maximum ampacity due to an increase in conductor resistivity, RT. Since this presents the probability of further power dissipation and temperature rise, good design practice must consider effective methods not only to control and reduce conductor resistivity, but also to provide low thermal resistance pathways for heat dissipation. In a printed circuit board ampacity depends on a number of different factors: - Conductive + convective capability provided by spreading layers, ground layers, stackup - Ratio of track width to thickness - Ambient temperature - Adjacent high current tracks - Presence and frequency of partial cross-section shrinkage - Presence, number, and conductive cross-section of plated through holes in series with the conductor Therefore optimum current design needs to consider more variables than are normally addressed by the IPC 2152 current vs. temperature charts. Figure A. RTU Teardown (functional components to scale) source: iFixit, BPA 10 EDN Europe | MAY 2014 www.edn-europe.com


EDNE MAY 2014
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