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EDNE MAY 2015

ADC full scale range By Ian Beavers, Analog Devices Many analogue-to-digital converters (ADCs) sample a voltage between the true and complement analogue inputs, so they define their input full scale input range (FSR) in terms of a differential (Vpp) or single-ended voltage (Vp), but many system designers really need to know how much input power, in dBm, that the ADC can handle before the input becomes saturated. The full scale input range of an ADC specifies the largest signal amplitude that can be delivered to the converter inputs before the digital output representation of the signal is clipped. At full scale, the output uses the minimum and maximum codes of the ADC. Some systems seek to maximise dynamic range by using as much of the effective input range as possible, but a saturated ADC will exhibit distortion and poor performance. Most ADCs have a fixed input impedance; others may provide selectable impedance values. Along with the input voltage, the impedance will determine the input power needed to drive the ADC input to its maximum, so we can convert the full scale voltage from an ADC data sheet to power in dBm, as long as we know the ADC input impedance. For example, what is the full scale input power in dBm of an ADC with the following full scale input range and input impedance? ADC full scale input range = 1.0 Vpp = 0.5 Vp = 0.3535 Vrms ADC input impedance (Rin) = 50Ω Signal power = ((Vrms²)/Rin) in Watts Signal power = 10 log(((Vrms²)/Rin) × 1000 mW/W) in dBm = 10 log((0.3535)²/50) + 30 dBm = 3.978 dBm Analog Tips The great things about using input power expressed in dBm are that the values are portable and the math is easy. For example, a doubling of power can be calculated simply by adding 6 dB, and a –1 dB signal with respect to full scale would require an input power of 2.978 dBm for this ADC (3.978 dBm – 1 dB). A frequency domain FFT expresses signal power in dB, so the power at the ADC input can be determined by subtracting an FFT bin power from the full scale power. An ac-coupled signal to the ADC will be centred about the common mode voltage, Vcm. This will ensure that the maximum signal power can be realised by the ADC without clipping. A full scale signal will reach the minimum and maximum codes of the ADC, while a signal with increased power will saturate the input and have its digital representation clipped. The power in dBm can be calculated from the full scale voltage and the input impedance. Ian Beavers ian.beavers@analog.com, a staff engineer for the Digital Video Processing Group at Analog Devices (Greensboro, NC), is a team leader for HDMI and other video interface products. With over 15 years’ experience in the semiconductor industry, he has worked for ADI since 1999. He holds a bachelor’s degree in electrical engineering from North Carolina State University and an MBA from the University of North Carolina at Greensboro. 20 EDN Europe | MAY 2015 www.edn-europe.com


EDNE MAY 2015
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