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EDNE MAY 2015

BY Bonnie Baker, Texas Instruments BAKER’S BEST click-to-expand Figure 2 This is a typical interface configuration between the microcontroller and the SAR-ADC. These lines are not independent because of their proximity to each other on the same board. Figure 3 shows an example of ringing in the SCLK and DOUT line, as well as crosstalk between the DOUT and SCLK traces. The IBIS model correctly identifies the problems with this PCB. Additionally, modifying the termination values along with making a PCB trace adjustment on the board corrects these problems (Figure 4). Figure 4 Signal integrity problems can be solved with proper termination. If the PCB is modeled accurately, IBIS evaluation helps to identify the possible transmission problems that may exist on the board. Once notified of these problems, you can adjust the trace length or location. Simulation is a tricky thing when it comes to SAR-ADCs. Presently, there is no complete converter model that accurately models the entire device. Resources available are an analogue SPICE file that models the analogue input pin stability, and an IBIS model that assists with finding the PCB signal-integrity problems. For more IBIS information refer to “IBIS Model: A Conduit into Signal Integrity Analysis, Part 1,” and “The IBIS model, Part 2: Determining the total quality of an IBIS model.” Don’t get me wrong. Evaluating the details of your ADC prior to designing it in is critical. This is most easily done by studying the product data sheet. Once you do make your final determination, simulation is the next prudent step. The good fortune of having the SAR-ADC TINA-TI spice and IBIS micro-models available is that you now have utensils that address the most critical, difficult converter issues. References ❶ ADS8860 IBIS model ❷ ADS8860 datasheet ❸ Baker, Bonnie, “The IBIS model: A conduit into signal integrity analysis, part 1,” Analog Applications Journal (SLYT390), Texas Instruments, 4Q 2010 ❹ Baker, Bonnie, “The IBIS model, Part 2: Determining the total quality of an IBIS model,” Analog Applications Journal (SLYT400), Texas Instruments, 1Q 2011 ❺ Baker, Bonnie, “The IBIS model, Part 3: Using IBIS models to investigate signalintegrity issues,” Analog Applications Journal (SLYT413), Texas Instruments, 2Q 2011 Figure 3 Here there are induced reflections from mismatched termination impedances. 24 EDN Europe | MAY 2015 www.edn-europe.com


EDNE MAY 2015
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