Page 12

EETE APRIL 2013

Nvidia R&D chief sketches road to chip stacks By Rick Merritt Low-cost organic substrates paired with new I/O techniques represent the best path to 3-D chip stacks, said Nvidia’s chief scientist. The company may experiment with such techniques as early as next year in preparation for Volta, its graphics processor slated for 2015. In a wide-ranging interview, William Dally pooh-poohed the need for cache-coherent memory between CPUs and GPUs being developed by rival AMD. Dally also underscored the rising importance of graphics in computational photography and exascale computing. Chip stacking is increasingly seen as an alternative to moving to the next semiconductor node at a time when process technology is providing less bang for the buck. “It used to be the latest node was critically important,” said Dally, who also serves as Nvidia’s vice president of R&D. “When Dennard scaling was in effect, if you were a node behind you were down a factor of three and basically screwed,” he said. “Now the difference between Nvidia says it will roll in 2015 Volta, a graphics chip using stacked memory. 28 and 20 nm is probably like 20 to 25 percent,” Dally said. “That means to me process doesn’t matter that much anymore, so if we are clever about architecture and circuit design, we can make up for the fact that we have competitors that are a node ahead,” he said referring to archrival Intel. One of the clever architectures engineers in Nvidia’s labs are working on is a ground reference signalling scheme geared for future system-in-package devices. The approach, still in research, promises links running at less than half a picojoule per bit at 20 Gbits/second, said Dally. The I/O could enable organic substrates that are less expensive than silicon interposers but need physically larger links. Nvidia wants individual links that run at 10 Gbits/second per pin, about ten times the rate of today’s links, to enable components with 200 Gbytes/s bandwidth, Dally said. IBM has used relatively large organic substrates for processor modules measuring as much as 100 mm on a side, Dally said. He sees the substrates used in 2.5-D stacks where a graphics die is laid next to a DRAM stack. Graphics chips generate too much heat to be stacked vertically with memories, and such stacks face relatively high costs and low yields, he added. Competing in stacks and SoCs Nvidia has been studying “use cases across the product line” for chip stacks, he said. It would make sense to test the technology first on a midrange GPU as one member of a more conventional family of components. “We need to try it out in some way to hedge our bets a little bit,” Dally said. “You learn a lot when you put a new technology into a volume product, so I think we want to do it in a way that it adds a feature, but the mainstream product doesn’t depend on it,” he said. At a recent annual conference, Nvidia chief executive Jen-Hsun Huang announced the company will ship in 2015 a nextgeneration graphics processor called Volta that uses stacked memories. However, he didn’t give any details about the device or the technology it will use. The push for a 2.5-D stack on an organic substrate makes sense, said Tummula Rao, a researcher in the field at Georgia Institute of Technology. “We at Georgia Tech are doing memory stacking in organics too and planning to do 2.5-D as well,” he said. A Georgia Tech researcher working on 3-D stacks with through silicon vias was more skeptical. “It seems organic interposers will win in terms of cost, yield, and reliability, and silicon interposers will win on interconnect size/pitch, performance, and power,” said Lim Sung Kyu. “If the target application calls for high memory bandwidth, I am not even sure if organic interposers can even meet the requirements,” he said. Separately, Dally said SoCs that merge CPU and graphics cores do not need the kind of cache coherent memory architecture rival AMD is helping develop as part of the Heterogeneous Systems Architecture alliance. Instead, Nvidia will implement in 12 Electronic Engineering Times Europe April 2013 www.electronics-eetimes.com


EETE APRIL 2013
To see the actual publication please follow the link above