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EETE FEBRUARY 2013

EMBEDDED ELECTRONICS EEMBC to develop Ultra-Low Power microcontroller benchmarks By Nick Flaherty The Embedded Microprocessor Benchmark Consortium (EEMBC) has set up a working group to develop a standardized, industry-endorsed method to evaluate the energy efficiency of ultra-low power (ULP) microcontrollers. To date, the industry has lacked a common method to test, validate, and compare the real-world energy consumption of these Microcontrollers that target applications such as portable medical devices, security systems, building automation, smart metering, and also applications using energy harvesting devices. The new benchmark will initially look at the power used when a controller moves from running to its real time clock sleep mode. New benchmarking code will be required as the standard CoreMark benchmarks use too much power, says Horst Diewald, chief architect of MSP430 Microcontrollers at Texas Instruments (TI) in Germany who is chair of the EEMBC ULP working group. “We have seen a significant need for a well-constructed, industry-accepted benchmark to equitably evaluate the energy efficiency of microcontrollers,” said Diewald. “Unfortunately, the application developer cannot rely on datasheet parameters alone to compare total Microcontroller power consumption and select an appropriate microcontroller.” The first benchmark should be available by the end of March to assess different controllers. Members of the group include Analog Devices, ARM, Atmel, Cypress, Energy Micro, Freescale, Fujitsu, Microchip, Renesas, Silicon Labs, STMicro and TI, although some notable energy harvesting device developers are missing. Unlike other EEMBC benchmarks that endeavor to measure the top performance of processors and systems, the ULP benchmark will focus on measuring the energy consumed by Microcontrollers running various computational workloads over an extended time period. The benchmarking methodology will allow the Microcontrollers to enter into their idle or sleep modes during the majority of time when they are not executing code, thereby simulating a real-world environment where products must support battery life measured in months, years, and even decades. “EEMBC’s primary goal is to develop fair and unbiased benchmarks for the embedded industry. In support of this goal, I am very excited that the EEMBC members are so motivated to develop this much-needed ULP benchmark,” said EEMBC president Markus Levy. “In the system developer’s interest, we encourage all relevant companies, including the system manufacturers, Microcontroller vendors, and tool providers, to join us in this effort.” Samsung reveals eight-core mobile processor By Peter Clarke Samsung Electronics has launched an eight-core ARMbased processor that uses the big-little processing technique announced by ARM Holdings plc in 2011. The announcement was made by Stephen Woo, Systems LSI president of the Samsung during a keynote presentation at the Consumer Electronics Show being held in Las Vegas. Woo said the Exynos 5 Octa is the world’s first mobile application processor to implement the big-little processing strategy. The chip has a quad-core Cortex- A15 processor optimized for high performance and a quad-core Cortex-A7 processor that is optimized for lowest power operation. The Exynos 5 Octo is a follow-on to the Exynos 5 Dual, which is already designed into products including the Google Chromebook and the Samsung Nexus 10 tablet. Samsung did not indicate in what manufacturing process technology the Exynos 5 Octo is implemented or the highest clock frequency or lowest voltage operation of which the chip is capable. In a statement issued by Samsung Woo described the Exynos 5 Octa as the “best application processor currently available.” It is a claim for which there is much competition. At CES Qualcomm has announced the Snapdragon 800 quad-core processor, Nvidia has announced the Tegra 4 and ST-Ericsson the NovaThor L8580 ModAp. Both the Snapdragon and NovaThor parts have an LTE modem integrated with the application processor. Warren East, CEO of ARM, joined Woo on stage and helped introduce the big-little technology that debuts in the Exynos 5 Octa. The application processor provides up to 70 percent higher energy efficiency than the previous quad-core Exynos. Samsung did not disclose what process technology is being used for the Exynos 5 Octa, nor what graphics processing unit has been selected. The previous generation Exynos 4 Quad and Exynos 5 Dual are both made using 32-nm CMOS and include quad-core Mali GPUs, also licensed from ARM. There is speculation that the Octa chip is implemented in 28-nm CMOS and that the quad-core Cortex-A15 runs at up to 1.8-GHz and the Cortex-A7 cores run at 1.2-GHz. Similarly it is thought that the GPU is the ARM Mali-T604 quad-core GPU used in the Exynos 5 Dual, with the two chips also likely to share the same 32-bit dual-channel 800MHz memory controller with its DDR3 and LPDDR3 memory support and peak 12.8GB/s bandwidth. If the Exynos 5 Dual is a guide the Octa will have a dual channel 32-bit memory interface capable of 800-MHz LPDDR3/ DDR3 or 533-MHz LPDDR2 capable of 12.8-Gbyte per second and 8.5-Gbyte per second bandwidth respectively. 38 Electronic Engineering Times Europe February 2013 www.electronics-eetimes.com


EETE FEBRUARY 2013
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