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EETE FEBRUARY 2013

Chip engineers prepare for 450mm wafer transition By Christoph Hammerschmidt At the 10th Innovation Forum on Fab Automation in Dresden, participants and presenters discussed technology trends in manufacturing automation. Since this event has been launched by a group of companies which are active in the field of semiconductor manufacturing and is attended in the first place by participants out of this industry segment, it is only natural that the presentations also focused on automation in IC production - especially as the host for this year’s forum was chipmaker Globalfoundries. Although many players in the European semiconductor industry resist the introduction of 450mm wafers, it is inevitable we’ll climb this technology step, predicted Malcolm Penn, CEO of market research firm Future Horizons. And despite the horrendous costs circa US$10 billion and more, such fabs will be cost-effective compared to 300mm fabs. The productivity of this new class of giga-fabs will be boosted by new production concepts which include a high degree of automation. In contrast to the transition to the 300mm node, this time the transition will be properly planned and orchestrated throughout the industry, Penn said. Pioneering this transition are the Albany R&D lab which currently is conducting trials with one-off tools, and the Belgian research institute IMEC whose 450mm clean room is now approved and under construction. Yet unclear is the situation at the wafer supply side. “This is still a kind of bottleneck”, Penn said. While there is no compelling interdependency between geometry node, wafer size and lithography technology, these parameters will “inevitably” be coordinated, the analyst stated. Nevertheless it will take quite a while until the transition is really complete. Penn expects volume production of “real” 450mm wafers not to be launched before 2018, and by this time, the industry will have reached the 8nm node. As a consequence of the competitive Automation and productivity in semiconductor manufacturing were hot topics at the 10th Innovation Forum in Dresden. Here, a wafer handling robot. pressure generated by the 450mm fabs, existing 300mm production lines will migrate to ‘More than Moore” products as already announced by some market players such as Infineon and Texas Instruments. Penn described the 450mm technology as a kind of industrial mass destruction weapon, which will “annihilate” any 300mm-based production with its overwhelming productivity. Still the best chances for the conventional fabs processing wafers of 300mm or less will be found in the markets for advanced LED products and SiC substrates, the market analyst said. “It is tragic that ST, NXP and Infineon are so unenthusiastic about embracing 450mm” Penn criticized. “This could destroy the whole European microelectronics industry”. Nevertheless, Europe will continue to be a key contributor to the 450mm technology. Namely ASML is about to become the key R&D lithography provider for the world. “Japan seems to have almost given up trying to match ASML”, Penn said. Along with the transition to larger wafers and smaller geometries, the industry is preparing for the introduction of EUV (Extreme Ultra Violet) lithography. Markus Bender, Innovation Engineer for the Advanced Mask Technology Center (AMTC) in Dresden, provided valuable insights into the state of the EUV technology. The AMTC, a joint venture of Globalfoundries and Toppan Photomasks Inc., provides lithography masks for chipmakers across Europe and deals with leading-edge EUV technology. Nevertheless, there is a number of critical issues. The most important ones are creating a mask yield and defection inspection review infrastructure, building a reliable long-term light source, and developing high quality photoresists that meets the requirements for ultra-small geometries. By 2014, the ongoing trend towards smaller geometries will generate the need for a reliable EUV source for the first cost-effective chip production. By this time, 200W of power will be sufficient, Bender said. Over time, the source power needs to be augmented from 500 to 1000W. Since no EUV pellicle is available today, mask protection is another issue. For this reason, masks need to be cleaned at the point of use which certainly hampers productivity as long as no pellicles are developed. According to Bender, a workaround is the use of dual pods. In addition, the price per mask will be significantly higher than for a conventional lithography mask. All in all, it remains to be seen if the use of EUV technology eventually will lead to lower prices per transistor compared to conventional processes, Bender said. Nevertheless, EUV will be introduced into commercial production “within the next couple of years”, the insider expressed his belief. Actually, this is what the industry has been announcing for many years, but “now it is really about to happen”, Bender corroborated. 6 Electronic Engineering Times Europe February 2013 www.electronics-eetimes.com


EETE FEBRUARY 2013
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