Page 33

EETE JAN 2014

50 mΩ at 200 MHz, 110 mΩ at 900 MHz and 140 mΩ at 2 GHz. To reach a global impedance of 140 mΩ at 2 GHZ, as this frequency is way above the SRF, several MLCCs must be added in parallel. Designers, however, need to find a capacitor with very low impedance over a broad frequency range. IPDiA R&D’s team of expert has addressed this issue and has set up a new PICS capacitor quasi fractal design, so called ‘Mosaïc’ that provides a way to reduce the ESR/ESL of the global structure – see figure 2. The approach consists in increasing the contact density with the electrode to obtain a less resistive backend (metallic) grid. Optimization is carried out to minimize the grid ESR and ESL while the individual Mosaïc cells are massively parallelized to control the global ESR/ESL. When comparing this new generation of silicon capacitors with X7R and COG 100 nF capacitors – see figure 3 –we can see that no inductive transition is observed up to 10 GHz for the PICS capacitor and that it acts as a lowimpedance element over a wide range of frequencies while X7R and COG capacitors act as low-impedance elements over a limited range of frequencies. IPDiA PICS capacitor provides the best result in terms of low impedance for frequencies higher than 20 MHz compared with COG and 35 MHz compared with X7R. Comparing capacitance density, we observed that whilst offering 100 times more capacitance density (2000 nF/mm3 Table 1: Die thickness and the corresponding capacitor density. vs 20 nF/mm3), IPDiA 3D Silicon capacitors also offer better ESR characteristics (20 mΩ versus 100 mΩ when compared with Type I capacitors). For Type II, IPDiA offers unique capacitance stability performance with an ultra-low profile of 80 μm and 20mΩ of ESR when X7R and X5R capacitors offer a standard thickness of 300 μm at the same level of ESR, with lower stability performance. Improving decoupling performance has usually been based on the idea of reducing the ESR. Low ESR MLCCs have been widely used for this purpose. However, nowadays, in new DC/DC converters operating at much higher frequencies, a very low impedance device is required. A standard capacitor can in fact only be used up to the SRF. Above the SRF, the user essentially has a “DC blocking inductor”. In order to extend the usable frequency range in such applications, IPDiA is offering ultra low ESL structures, in a low profile form factor, which drastically decrease the overall impedance above the SRF and offer the best solution for decoupling performances in the 35 MHz to 10GHz frequency range. Fig. 3: Impedance magnitude for 100 nF capacitor element. Comparison of PICS, COG and X7R. www.electronics-eetimes.com Electronic Engineering Times Europe January 2014 33 ew14_190x136_EE_TimesEurope_Wissen.indd 1 17.10.13 10:51


EETE JAN 2014
To see the actual publication please follow the link above