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EETE JAN 2016

NEWS & TECHNOLOGY photovlotacis Dual-junction solar cell claims efficiency record SBy Paul Buckley cientists at the Swiss Center for Electronics and Microtechnology (CSEM) and the USA’s Energy Department’s National Renewable Energy Laboratory (NREL) claim to have jointly set a world record for converting non-concentrated sunlight into electricity using a dual-junction III-V/Si solar cell. The newly certified record conversion efficiency of 29.8 percent was set using a top cell made of gallium indium phosphide developed by NREL, and a bottom cell made of crystalline silicon developed by CSEM using silicon heterojunction technology. The two cells were made separately and then stacked by NREL. “It is a record within this mechanically stacked category,” said David Young, a senior researcher at NREL. “The performance of the dual-junction device exceeded the theoretical limit of 29.4 percent for crystalline silicon solar cells.” Young is co-author of a paper entitled ‘Realization of GaInP/Si dual-junction solar cells with 29.8 percent one-sun efficiency’, which details the steps taken to break the previous record. His co-authors from NREL are Stephanie Essig, Myles Steiner, John Geisz, Scott Ward, Tom Moriarty, Vincenzo LaSalvia, and Pauls Stradins. The paper has been submitted for publication in the IEEE Journal of Photovoltaics. Essig attracted interest from CSEM when she presented a paper, “Progress Towards a 30 percent Efficient GaInP/Si Tandem Solar Cell,” to the 5th International Conference on Silicon Photovoltaics, in Germany in March. silicon activities at CSEM. A new design for the dual-junction solar cell and the contributions collaboration results indicate that even greater efficiency can be achieved by the combination of NREL and CSEM cells. Leti strains to improve FDSOI By Peter Clarke French research institute CEA-Leti has reported on two techniques to put local strain in the silicon channel of a fully-depleted silicon-on-insulator (FDSOI) manufacturing process. STMicroelectronics and Globalfoundries are championing the FDSOI process as a means to achieve world-class energy efficiency in leading edge integrated circuits without the complexity and expense of FinFET manufacturing. Strain on the crystal lattice is used routinely to increase mobility in conventional planar CMOS and in FinFET CMOS. Leti (Grenoble, France) is now proposing its use on next-generation FDSOI circuits to realise the same benefits; higher performance at the same or lower power consumption. Two techniques are required because p-channel FETs in FDSOI require compressive strain of silicon-germanium channel “We believe that the silicon heterojunction technology is today the most efficient silicon technology for application in tandem solar cells” said Christophe Ballif, head of PV activities at CSEM. “CSEM partnered with the NREL scientists with the objective to demonstrate that 30 percent efficient tandem cells can be realized using silicon heterojunction bottom cells, thanks to the combination with high performance top cells such as those developed by NREL,” said Matthieu Despeisse, the manager of crystalline from CSEM were key to setting the record. The first material while a tensile strain is required to improve the silicon n-channel FET. The two techniques Leti has developed can induce local stress as high as 1.6GPa in the channel. The first technique uses the transfer of strain from a relaxed SiGe on top of the SOI film. This has been used to boost shortchannel electron mobility by more than 20 percent. The second technique relies on creep in the buried oxide under high temperature annealing to insert tensile strain in the overlying silicon. BOX-creep can also be used to introduce compressive strain, Leti said. Such strained channels enable an increase in the on-state current of CMOS transistors and more performance at same power or a reduction in power consumption for a given performance. While stain was not necessary for 28nm FDSOI it is beyond the 22/20nm node, Leti said. 24 Electronic Engineering Times Europe January 2016 www.electronics-eetimes.com


EETE JAN 2016
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