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EETE JAN 2016

NEWS & TECHNOLOGY open osurce ahrdware Free core, some assembly required By Rick Merritt It’s early days for RISC-V - a free, open-source core seen as the Linux of microprocessors. On its long to-do list, engineers still need to define basic pieces of the instruction set architecture including its memory model, how it will speak to the external world of I/Os and how to debug it. Many of the about 150 developers who signed up for the third RISC-V workshop volunteered to start a handful of working groups to address the most pressing issues in fundamental areas including security, virtualization and compliance. Proponents said the effort has taken the vanguard of the open source hardware movement, attracting leaders of earlier OpenCore and OpenRISC efforts. The LowRISC project at the University of Cambridge is attracting interest as the likely first source of real development hardware. The team which includes members of the Raspberry Pi project hopes to have first silicon this year and plans to make low cost development boards available in 2017. The first of several planned LowRISC chips will tape out before the end of the year, a 3mm2 28nm part that fits in BGA package. It will use four cores running at less than a GHz with 512 Kbytes L2 cache and a 32-bit LPDDR3 memory controller. The group ultimately aims to deliver a low-cost board made completely with open source digital logic. Until LowRISC is available, developers will work with a handful of emerging system simulators and soft cores mainly implemented in FPGAs. One engineer said he is 80% done with a QEMU emulator for RISC-V that could be completed in two weeks. Such tools will be key for the biggest job ahead, creating a software ecosystem for RISC-V. Ports of a handful of Linux variants including FreeBSD are well underway as are other low-level components, but ports of more widely used RTOSes and Android are more than a year away. Ultimately, the effort must attract the broader world of applications developers if it is to become commercially significant. “We need more developers and more documents and specifications to reduce their startup costs,” Arun Thomas, an R&D engineer at BAE Systems told attendees. So far, developers from seven universities and companies including BAE, Bluespec, Google, LG Electronics and Vectorblox have made 48 software contributions to RISC-V on GitHub. Thomas rattled off a laundry list of needs ranging from specs for direct-memory access, an I/O memory management unit, performance counters, an applications binary interface, bootloaders, hypervisor and security extensions as well as the kind of detailed programming guides ARM provides its users. “There’s a fair amount of work ahead just on the spec side,” Thomas said. A basic port of FreeBSD was created from scratch with 25,000 lines of fresh code written in the last six months, reported Ruslan Bukin, a researcher at the University of Cambridge. This year the group aims to add support for multicore architectures, floating point units, Ethernet drivers and expanded virtual addresses. Small companies seek ARM alternative The good news for RISC-V is it has attracted a core of seasoned engineers enthusiastic about the project’s potential. For example, Jon Masters, chief ARM architect for Red Hat, took a vacation day to attend the workshop and volunteered to lead a key task group defining a platform specification. Masters said hopes to write a book about porting Linux to the first commercial open source core. Others said the event marked a historic moment in what will likely be a ten-year process to establish a free microprocessor, disrupting the semiconductor industry in ways Linux upended the software world. “Everyone wants a free Linux core,” said Andreas Olofsson, chief executive of semiconductor startup Adapteva, who joined the fledgling platform working group. In today’s cost-squeezed environment, any company would adopt a free control core then try to create differentiation in software or other hardware blocks, said Olofsson who sported a beard that is a sign he is well along in working on his nextgeneration Epiphany processor. Engineers from small companies say they cannot afford the several million dollars required to license an ARM core, several weeks to negotiate the license and a manyear of engineering to integrate it into an SoC. Using roughly similar engineering resources, they can modify RISC-V to suit their needs, something not allowed under a standard ARM license, Olafsson said noting Adapteva is already contributing to and drawing from open-source hardware efforts. Bigger companies are already kicking the tires. For example, the chief technologist of Chelsio and a member of Microsoft’s silicon group attended the event. “I could see how pretty quickly a RISC-V core could be useful for something simple like a security processor that doesn’t need to run a full operating system,” said Eric Mejdrich, a principal hardware architect from the group developing chips inside the Xbox and HoloLens. For companies willing to accept some risk, the cores could be ready to use in commercial chips within a year, according to 8 Electronic Engineering Times Europe January 2016 www.electronics-eetimes.com


EETE JAN 2016
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