026_EETE-VF

EETE JULAUG 2013

Fig. 5: Constraining signals for minimum skew by applying input/output delays. We can, thus, write as shown below: set_input_delay <max_input_delay> signal2 –max set_input_delay <min_input_delay> signal1 –min In a similar way, we can constrain the output signals too for skew requirement by applying output delays as we constrained by applying input delays in case of input signals. If the data signals are constrained like this, the constraints can be applied at synthesis/implementation too as input/output delays are supported by all synthesis and implementation tools. Manual iterations are very few. On the other hand, for defining these checks, we need to have one reference clock. If we do not have a clock defined for the protocol, we cannot define these. Also, since regular setup and hold checks are also to be met, it becomes quite complex and confusing to calculate the amount of min and max delays to be applied. Although the range of input and output setup times is fixed, there needs to be made some adjustments within this range, based upon the path delays and placement of the protocol logic inside the SoC. As in min/max delay, due to delay variations across PVTs, these checks need to be adjusted for different PVTs. Applying setup/hold checks The most effective way for constraining the signals with respect to maintaining a skew between them is to apply data checks between them. According to the definition of data-to-data check, it is applied between two signals, neither of which is a clock. Here, we can consider one of the signals as a reference and define other signal’s relationship with respect to it. The port having the reference signal becomes ‘reference port’ whereas the other port, i.e. the port which is constrained, becomes the ‘constrained port’. This method is different from the method described above in the sense that we do not need to define the reference data as a clock here. Data check is similar to normal setup/hold check. An important difference is that data check is performed on the same edge as the launch flop (in normal setup check, capture edge is one edge away from launch edge). That is why, data to data Fig. 7: Constraining signals to be within a window by applying data-to-data checks. checks are known as ‘zero cycle checks’. A data-to-data check may be specified using ‘set_data_ check’ command in EDA tools. set_data_check –from <reference_port> -to <constrained_ port> <value> -setup/-hold To constrain the signals for minimum skew requirement, we can simply apply data-to-data setup check (to constrain reference port to come later) or data-to-data hold check (to constrain the reference signal to come earlier), since data-to-data setup check is zero cycle – see figure 6. To constrain the reference signal to come later, set_data_check <skew_requirement> -from <reference_ signal> -to <constrained_signal> -setup To constrain the reference signal to come earlier, set_data_check <skew_requirement> -from <reference_ signal> - to <constrained_signal> -hold On the contrary, to constrain the signals to be within a window, both setup and hold checks need to be applied – see figure 7. Also, the values to be applied have to be negative. In addition, a multicycle of -1 for hold needs to be applied. The combination of commands to be applied is as follows: set_data_check -<skew_requirement>/2 –from <reference_ signal> -to <constrained_signal> -setup set_data_check -<skew_requirement>/2 –from <reference_ signal> -to <constrained_signal> -hold set_multicycle_path -1 –to <constrained_port> –from <reference_port> -hold Constraining the signals for skew requirement using data-todata checks has several merits. As mentioned above, it is the simplest way to apply these types of constraints. Only relative skew between the signals matters while the signals themselves may have any value of delay. Unlike input/output delay method, there is no need for a clock to be present and the window requirement does not need to be updated across corners. However, uncertainty and derate values need to be taken into account, if applied. Though data-to-data checks provide a robust and efficient way to apply these constraints, still there is some scope of improvement. Like it does take into account the uncertainties and derate, whereas the requirements specified are without any uncertainties and derates. So, we have to either make these windows larger taking into account uncertainties and derates; or we need to have support in EDA tools for path based derates and uncertainties. Fig. 6: Constraining signals for minimum skew requirement by applying data-to-data setup check. www.electronics-eetimes.com Electronic Engineering Times Europe July/August 2013 25


EETE JULAUG 2013
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