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ENCRYPTION & DATA SECURITY • Repeat steps (a) & (b) for VM3/Linux-3 • The hypervisor proceeds to run VM/ Guest context switching (CS) according to the established policies Conclusion There are many approaches to securing embedded platforms today. By definition, an embedded platform generally contains proprietary software developed by an OEM based on the set of reference designs and development kits provided by the SoC manufacturer. As a result, in general, most implemented security techniques have been proprietary. As embedded platforms open up to new third party software, there is a critical need to isolate and protect proprietary software while provisioning for new software capabilities. OEMs are forced to find new ways to address these challenges while maintaining equivalent cost, power and performance compared to existing solutions. Next-generation approaches must go beyond binary approaches to create multiple secure domains, where each secure/non-secure application/operating system can operate independently in its own separate environment. In addition, these platforms must address the scalability that heterogeneous architectures require by protecting all of the processors in a SoC – including the CPU, GPU and others. In a heterogeneous architecture, application data and resources will be shared between the CPU and other processors in the system, so those processors will now face the same level of exposure as the Fig. 5: Booting the system into a secure hypervisor state. CPU, and must be given the same level of protection. Hardware-assisted virtualization provides an ideal and proven foundation for hardware enablement and extensions needed for next-generation embedded security. A hardware virtualization-based security approach like Imagination’s OmniShield ensures that applications which need to be secured are effectively and reliably isolated from each other, as well as protected from non-secure applications, while still meeting required levels of functionality, performance, cost, and power consumption. Combined with trusted hypervisors for OmniShield and other OmniShield-ready IP, companies can implement a truly secure, heterogeneous multi-domain application environment using hardware-enforced separation and protection throughout the SoC. Extensible CPU cores exploit IoT’s vast potential By Charlie Su Cisco Systems has predicted that by 2020, there will be 50 billion “things” connected to the Internet up from 15 billion predicted this year. Connecting “everything” to the Internet requires some level of customization and specialization in the design of the individual items being connected based on their unique operating environments and requirements. This means that the one-size fits all embedded processor model that characterized the portable device market breaks down when applied to the Internet of things (IoT). The example of the connected home provides evidence of this contention. According to research estimates gathered from ABI Research, TechNavio, Pike Research, and BI Intelligence; connected-home devices will take the form of • Energy devices: smart thermostats, smart lighting, • Safety/security: monitor, cameras, alarm, and • Smart appliances: washers, dryers, refrigerators Each of these categories as well as individual products within the categories will need unique processing requirement to meet the cost, power, and performance provisions of their individual Fig. 1. M2 Communications M2C8001 SoC in an electronic shelf label application. applications. Besides the smart home, health care, automotive and industrial will also demand individually unique embedded computing solutions. One design that illustrates the unique computing requirement of an IoT device is the electronic shelf label (ESL). Retailers use the ESL to display product information and price on their shelves. A liquid crystal display or other technology, such as electronic paper attached to the front edge of a retail shelf, displays the product information. The product pricing and other information displayed on an ESL is automatically updated whenever changes occur. An Andes customer uses a 60-MHz AndesCore N801 core with 128KB of eFlash to control an ESL Charlie Su is CTO and Senior Vice President of R&D at Andes Technology Corporation - www.andestech.com 26 Electronic Engineering Times Europe June 2015 www.electronics-eetimes.com


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