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EETE JUN 2015

Sponsored Contributed Article How Superjunction MOSFETs with ‘GaN-Like’ Switching Losses Address Design and Cost Challenges of Hard- and Soft-Switching Applications By Franz Stückler, Infineon Technologies* Ever-faster switching speeds, ever-lower losses, optimum conservation of board space and minimized total cost of ownership (TCO) are among the critical challenges facing today’s power supply designers. By driving down on-state resistance while providing ‘GaN-like’ switching losses, the latest superjunction (SJ) MOSFET technologies hold the key to addressing these challenges in modern hard- and soft-switching applications. Power Conversion Requirements Today’s high-end power conversion applications divide into those that are driven by the need to maximize efficiency (and minimize running costs and, therefore, total cost of ownership) and those that demand high levels of efficiency but must also meet strict bill of materials (BoM), cost and form factor requirements. In all cases, the engineering challenge is to optimize highpower switched mode power supply (SMPS) designs to meet specific application requirements. A variety of SMPS topologies can be employed, categorized as either ‘hard-switching’ or ‘soft-switching’ in terms of operation. In hard-switching topologies, like power factor correction (PFC) circuits, there is an overlap between voltage and current when switching the transistors on and off. This overlap causes energy losses that can be minimized by increasing switching speed (though this can impact the EMI behavior). In soft-switching topologies such as LLC resonant converters, either voltage or current is brought to zero before the transistor is turned on or off. This has benefits in terms of losses, while the smooth resonant switching waveforms help minimize EMI. For the SMPS designer the choice of power MOSFET is crucial. Today’s power supplies demand devices that can be switched efficiently and reliably at high voltages and high frequencies – demands that have, in recent years, been addressed by moving away from conventional planar MOSFETs to those that use superjunction (SJ) technology. The majority of such MOSFETs have been employed in hard-switching designs, but the latest advances are seeing SJ MOSFETs that address hard- and soft-switching requirements in parallel. CoolMOS 600V C7 Pushes the Boundaries The CoolMOS C7 600V MOSFET family is a truly “universal” technology in that the devices will meet the performance, efficiency and power density demands of both hard- and softswitching topologies. They also represent the industry’s first MOSFETs to break the 1Ω per mm2 RDS(ON)*A limit. In a TO-247 package, for example, this translates into a maximum RDS(ON) of just 17mΩ, representing a ~10% improvement over the previous generation of 650V C7 SJ devices. In the case of a TO-220/D2PAK package, maximum RDS(ON) is still only 40mΩ, which is 36 Percent lower than the best competitor. At the same time, the C7 semiconductor structure reduces switching losses due to a lower typical gate charge (Qg) of around 107nC at 40mΩ as well as a lower gate-drain charge (Qgd) when compared to previous SJ technologies. The former, which is illustrated in Figure 1, leads to lower gate driving losses, and the latter is a significant parameter related to switching times and losses. Figure 1: Gate Charge (Qg) Comparisons for SJ MOSFETs It is also worth considering the improvements in output capacitance (COSS) that have been made possible by the C7 structure as illustrated in Figure 2, which compares COSS for CoolMOS C7 and the previous CoolMOS C6 generation. * Franz Stückler is the senior system application engineer for high-voltage power conversion at Infineon Technologies Figure 2: Output Capacitance (COSS) Comparisons for SJ MOSFETs 8 Electronic Engineering Times Europe June 2015 www.electronics-eetimes.com


EETE JUN 2015
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