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EETE MAR 2014

Implantable hearing aid boasts wireless charging By Julien Happich At this year’s IEEE International Solid-State Circuits Conference, MIT researchers have presented a paper on fully implantable hearing aids that would not require any connection to an external apparatus for operation. In their paper “A Fully-Implantable Cochlear Implant SoC with Piezoelectric Middle-Ear Sensor and Energy-Efficient Stimulation in 0.18μm HVCMOS”, the researchers detail the design of a middle-ear implant that converts the vibrations of ossicles in the middle-ear into electric signals fed to the cochlear (a small spiral chamber in the inner ear) through micro-electrodes. Demonstrated with measurements from human cadaveric temporal bones, the solution relies on a system-on-chip specifically designed to interface to a piezoelectric sensor, itself mounted at the umbo of the malleus within the middle ear, explains the paper. The IC also features a highly-reconfigurable digital sound processor that supports system power scalability through audio spectral channel selectivity. It also integrates neural stimulation via eight commercially available micro-electrodes. First, a piezoelectric sensor frontend (PZFE) conditions the signal from the sensor (the sound-induced motion of the umbo), the signal is digitized by a low-power SAR ADC before a reconfigurable sound processor implements continuous interleaved sampling (CIS). Research indicates that the speech recognition scores of cochlear implant users improve with the number of electrodes but plateaus after 7 or 8, hence for the demonstrator, it was decided that the number of channels could be reconfigured between 8, 6, or 4 to enable a power-performance trade-off. All processor parameters are programmable to enable a patient-specific fit, indicate the authors. Finally, a neural stimulator is implemented with a single current source interleaved among all electrodes at 1000 pulses/s per electrode while a high-voltage switch matrix selects the active electrode. Key to making this battery-operated implant workable (with a very small battery) was the development of a new signal-generating circuit that could further reduce the chip’s power consumption. For this purpose, the researchers specified a new waveform modulation scheme Fig. 1: A block diagram of the fully implantable cochlear implant SoC. to encode the acoustic information in a very power-efficient way that can still stimulate the auditory nerve in the appropriate way. In this exercise, MIT’s Microsystems Technology Laboratory (MTL) Professor Anantha Chandrakasan who specializes in lowpower chips, had to tailor the arrangement of low-power filters and amplifiers to the precise acoustic properties of the incoming signal. “One way the implant could be wirelessly recharged would be at night through a special pillow that the user sleeps on. Another way would be through a portable device, for example a cell phone that recharges the implant in the amount of time it takes to make a phone call” explained the paper’s lead author Marcus Yip who completed his PhD at MIT last fall. “In either case, we use magnetic resonance to transfer power between a pair of coupled coils, one in the transmitter and one in the implant receiver”, Yip added. The researchers have already designed a wireless charging controller chip and the associated circuits that complement the implant, to recharge it in roughly two minutes. Two of their collaborators at Massachusetts Eye and Ear Infirmary (MEEI), Konstantina Stankovic, an ear surgeon who co-led the study with Chandrakasan, and Don Eddington, tested it on four patients who already had cochlear implants and found that it had no effect on their ability to hear Fig. 2b: The actual chip in a wirebond package. Fig. 2a: Die micrograph of the prototype SoC. 20 Electronic Engineering Times Europe March 2014 www.electronics-eetimes.com


EETE MAR 2014
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