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add extra logic in the clock path of end-point. To save from this, we can try to group the end-points in the fanout of a single clock gating cell, and control the test-enable pin of the clock gating to mask the clock whenever required as per the algorithm. Thus, we are saved from timing the scan-in paths at-speed. However, the otherwise slow frequency test-enable of clock gating may be needed to be timed at full frequency. 4) Start-point end-point clock gating: This approach can be applied at RTL stage itself if multicycle paths are known in advance. This can also be considered as a 2-pass process. In first pass, the clock of all the startpoints can be gated. In second pass, the clock of all the end-points can be gated; thus, all the ‘X’ generated don’t propagate further. This scheme is illustrated in figure 8. Similar to case 3, the controls can control the test-enable pin of the respective clock gating cells. In this approach, when the start-point’s clock is gated, its output is static and vice-versa. In this case, we get the coverage of all possible valid paths, but number of patterns may be a bit higher than case 2. However, this approach guaranteed no X-propagation. As stated above, functional multi-cycle paths and false paths are sources of ‘X’. However, all functional multi-cycle paths are not by architecture. As an illustration, suppose we have more than one functional Fig. 5: Data-path masked with 0/1 control. Fig. 6: Pass 1 ➔ through-point acts transparent; endpoint is made to shift data; startpoint ➔ through-point ➔ endpoint path not formed. Fig. 7: Pass 2 ➔ through-point is blocked and endpoint acts in functional mode. No path through through-point is visible. Fig. 8: Pass 1 clock gated for startpoints, Pass 2 clock gated for endpoints. mode and an STA engineer decides to merge those modes. In that case, he may mark some of the paths as multi-cycle or false. However, these paths will be handled properly in transition testing too. Hence, these paths will not be source of X. Similarly, paths to reset pins can be treated multi-cycle. But resets are treated specially in DFT; hence, need not be masked in DFT modes. Ultra-Miniature | High Reliability Quartz Crystals, Oscillators and Sensors Medical Defense and Aerospace Industrial UNSURPASSED QUALITY • H i g h e s t m e c h a n i c a l s h o c k s u r v i v a b i l i t y i n t h e i n d u s t r y • Military temperature range and beyond • Exceptional stability and precision • Ultra-low power consumption • Excellent long-term aging AS9100C ISO 9001:2008 CX4_GLASS_A CX16A CX18A CX9A CX11A CXOL_A STATEK CORPORATION 512 N. Main St., Orange, CA 92868 Tel. 714-639-7810 | Fax 714-997-1256 www.STATEK.com www.electronics-eetimes.com Electronic Engineering Times Europe March 2015 25


EETE MAR 2015
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