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EETE MAR 2017

NEWS & TECHNOLOGY LIGHT EMITTING DEVICES Wafer-level micro-LED matrix delivers high brightness at 2540dpi By Julien Happich Researchers from Leti, a research institute of CEA Tech, have developed a self-aligning μLED fabrication process that supports the creation of high-resolution arrays of μLED at 10-micron pitch (roughly equating a 2540dpi resolution). SEM images of 8 μm pixels at a pixel pitch of 10 μm after spacers formation. The GaN mesa is etched down to the sapphire substrate (inset is a cross sectional view of a pixel revealing the internal structure). Starting with commercially available 2 inches and 4 inches epitaxial wafers with a 650μm thick sapphire substrate, the researchers grew a whole-wafer LED epitaxial structure consisting of a stack of 2μm of undoped GaN, 4μm of Si doped n-GaN, an active region made of GaN/InGaN multiple quantum wells (MQW), an AlGaN electron blocking layer and a 200nm Mg doped p-GaN at the top. Then, an Ag-based P metallization layer is deposited on top completed by a SiO2 hard mask. Only then, the pixels were shaped through a single lithography step to etch the hard mask, the top metallization layer and then the GaN mesas, defining the μLEDs’ self-aligned geometry. The pixels’ sidewalls were passivated and a common cathode was created through a damascene process. That included the electrodeposition of copper to fill the mesa grid and a chemical mechanical planarization step to reach the top pixel SiO2 hard mask through which each μLED were individually contacted via another damascene metallization step. In a paper titled “Processing and Characterization of High- Resolution GaN/InGaN LED Arrays at 10-Micron Pitch for Micro-Display Applications”, presented at SPIE Photonics West in San Francisco, the researchers reported the fabrication of circular μLEDs with diameters of 5μm, 6μm, 7μm and 8μm at a pixel pitch of 10μm. They demonstrated the viability of their manufacturing process by creating several wafer-level A 4-inch LED wafer after CMP planarization of the common cathode, each rectangle on the wafer is an 873x500 pixels μLED matrix. micro-displays in the shape of 873x500 pixel arrays (each with a 8.7x5mm footprint). What the experiment validates is that by filling the whole volume between the micro-LEDs, the common cathode spreads the electrical current between the pixels, providing good thermal dissipation and preventing voltage drops within the micro- LED matrix. Under test, the micro-LEDs exhibited a high brightness up to 107 cd.m-2, several orders of magnitude higher than existing commercial solutions, which makes them promising candidates for augmented reality or head up display applications. The paper reported an external quantum efficiency over 16% at 10 A.cm-2, The planarized micro-LED matrix would be suitable for hybridization on a CMOS active matrice, something the researchers are currently testing on prototypes. Of course, higher resolution and/or bigger size μLED arrays could be manufactured depending on the size of the wafer. Leti’s experiment on 4-inch wafers yielded approximately 100 such 873x500 μLED arrays. Increasing density or size, yield might decrease accordingly, in a comparable manner to other kind of microdisplays (such as OLED, LCOS). The research was initially funded by public funding (french ANR) and in collaboration with III-V Lab. Display development is now continuing with industrial partners. Schematic representation of the damascene process used to create a common cathode filling all space between every pixels of the μLED matrix. Optical microscope image of the corner of a 873x500 pixel μLED matrix before hybridization. The emissive μLED region is located on the top right part of the photograph while the two horizontal and vertical 4-pixel large lines are connections to the buried common cathode. 14 Electronic Engineering Times Europe March 2017 www.electronics-eetimes.com


EETE MAR 2017
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