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EETE NOVEMBER 2012

POWER ELECTRONICS Power management for solid state drives By Jeff Hooker Last year’s monsoon in South- east Asia created a turning point in the memory storage market. Flooding in Thailand caused the shutdown of many hard disk drive (HDD) manufac- turing sites, resulting in a worldwide shortage that nearly doubled the price of the drives. These shortages caused many manufacturers that relied on HDDs to convert to - ex- Fig. 1: Solid state drive block diagram. pensive solid state drives (SSD). Previously, SSDs had been predomi- put capacitance. This momentary surge nately used in either high performance in current can cause the input power applications, like gaming, or where the supply to droop and the system to high reliability of solid state drives was reset. Failure to understand the key ele- critical. ments of SSD power management and The performance advantages that to take the necessary precautions can SSDs brought to these new applications result in system errors, causing Flash resulted in the further commercialization controllers to miss-execute code and of Flash memory and SSD technology. cause Flash corruption that can make As competitors have flocked to the the drive unreadable. Finding a cost ef- market and production has increased fective power management solution that dramatically, the cost of Flash technol- addresses all the system issues is a key ogy has decreased to below $1/GB. consideration for reliable SSD designs. Competitive pricing, improved perfor- Figure 1 is a block diagram of a typi- mance and lower power have led SSDs cal SSD. At the heart of the system is a to gain ground rapidly as a replacement Flash Controller that manages the data for HDDs in many new applications transfer between the backplane or host ranging from notebooks to the front end and the bank of Flash memory devices. of cloud servers. It connects to the host through industry standard SCSI, PCIe or SATA data bus- The need for power ses, depending on the host application. management The magnetic disk (HDD) has been Designers, though, are realizing that replaced by non-volatile Flash memory. the SSD architecture has inherent reli- The maximum data transfer speed is ability issues if careful consideration limited by the write cycle, which is con- is not given to its power management. siderably longer than the read cycle. To Implemented properly, power manage- compensate, a SSD uses volatile DDR ment ensures that all the SSD’s ASICs memory as a write buffer. and memory devices start, remain in It is during the time the data is regulation and shut down in a controlled temporarily stored in DDR memory that manner. A unique power management it is susceptible to loss during a power consideration for plug and play SSDs is failure. Power failures can also result the addition of a hold-up capacitance in flash corruption if the Flash Control- bank that provides momentary backup ler is allowed to operate below its core power and corresponding hot swap voltage (in figure 1 the core is voltage is circuitry. Hot swap circuitry is critical to 1.2V). Even power glitches can cause control the initial flow of current, which the controller to miss-execute code, can be several amps, into the large in- resulting in Flash corruption. It is critical that the power manager monitors all the Jeff Hooker is a Senior Product system voltages and issues a power on www.tdk.eu Marketing Engineer at Lattice reset or power fail immediately during www.epcos.com Semiconductor Corporation – any power failure. Power management www.emea.tdk-lambda.com www.latticesemi.com – He can be accuracy and speed should be opti- reached atjeff.hooker@latticesemi.com mized to minimize SSD data corruption. www.electronics-eetimes.com Electronic Engineering Times Europe November 2012 53 TDK ad 60x277mm.indd 1 21.09.12 11:24


EETE NOVEMBER 2012
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