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EETE NOVEMBER 2012

NEWS & TECHNOLOGY DIGITAL SIGNAL PROCESSING French startup takes on FPGAs with multicore DSP chip By Nick Flaherty A FreNch chip stArtup has just sampled the first silicon of ing more cost advantages both in the chip and in the system a massively parallel digital signal processing (DSP) chip to take cost. “With the chip size and power consumption we have a on field programmable FPGAs. Kalray in Paris has sampled a very competitive solution versus a high end FPGA, typically ten 256-core digital signal processing chip built times the dollars per MIP,” explained Mon- in TSMC’s leading edge 28nm technology nier. “We are not the massive GPU chips but with a fraction of the power consump- with a big radiator and fan with 200W. For tion of today’s FPGAs. The company is the industrial applications we reduce the planning a version with 1024 high perfor- size of the design as there is less need for mance DSP cores on a single die. removing the heat, this reduces the typical bill of materials.” The first -Purpose Processor Array But this also provides the higher mar- MPPA-256 processor integrates 256 gins that a small company needs. “When processors onto a single silicon chip all we were part of a big semiconductor they connected by a high bandwidth Network were always looking at the consumer on Chip but typically consumes 5W for market with millions of chips,” he said. performance of 500Goperations/s. The “These are small scale applications we are chip also provides up to 230GFLOPS/s for targeting, not 10,000 devices a year but floating point calculations and is aimed at typically 50 to 2000 pieces.” custom applications in industrial markets, The development environment is key for particularly video and telecommunications DSP development as many other compa- infrastructure. nies have discovered at their cost. Along “The next stage is a smaller chip with 64 with the MPPA processor family, Kalray has processors but then the next step will be 512 Kalray’s CEO Joël Monnier, “We a software development environment called processors or with a small shrink we could see a convergence of vision signal AccessCore as well as development boards go to 1024,” said Joël Monnier, CEO at Kal- processing and communications” integrating in MPPA-Developer. ray. “The beauty of video applications is that they will use all the performance you can provide.” This 1024 It offers standard GNU C/C++ development tools and librar- processor version will provide almost 3TeraOP/s of performance ies including primitives for task parallelism and data parallelism at 400MHz. and the development environment also supports automatic The company was started at the heart of the financial crisis in mapping on MPPA hardware and memory resource sizing to as- 2008 by Monnier, a vice president at ST Microelectronics at the sist developers in obtaining optimal performance. time. “With a couple of colleagues we wanted to be a replace- Unlike other approaches, AccessCore provides a C-based ment for high end FPGAs and give more computing power for programming model which speeds up application development less power consumption while being easier to programme for and debug. Several programming levels are provided for differ- small and medium sized applications in the industrial market,“ ent user profiles, from Linux support for legacy functions to a he said. custom high level dataflow environment. Standard GCC & GDB “We see a convergence of vision signal processing and technologies are used for compilation & debug. communications,” he said. “Initially the project came from our “Kalray’s technology has been developed with many OEM expertise in video signal processing and imaging. You need a partners across several vertical markets, as well as partnering lot of computing power but it’s easy to parallelise the code so with third party software vendors,” said Monnier. it’s easy to map to the sea of processors that we have. On top Multiple MPPA chips can be interconnected at the PCB level of that for communications you need high bandwidth for data through Interlaken interfaces in the same way as FPGAs to so in a certain way we can meet a number of applications in the increase the processor array size and performance capability, industrial market.” but there are plans for larger single chip devices. The company The company is funded with around $25m so far from a is now ramping up for the next stage of expansion into Japan, combination of French investment funds, local funds, private Germany and the UK, followed by the US in the middle of next investors, and OSEO, a French public-sector institution who year. finance innovative projects from small companies. There wasn’t “We have 55 people and 30 in the lab at CEA so we have a problem to raise funding he says. “We are more agile so we 85 people working on the project,” said Monnier. “We plan to don’t need as much,” he added. The company works closely double the number of people in the next year, mostly for ap- with the French CEA lab on the architecture development and plications and software development. In Grenoble and Paris we with Global Unichip on the silicon design. have no problem finding good engineers because the project is Kalray is not looking at high volume design wins, but at the very attractive.” higher margin, custom designs that have previously used FP- GAs. The lower power also allows for cheaper packaging, bring- 6 Electronic Engineering Times Europe November 2012 www.electronics-eetimes.com


EETE NOVEMBER 2012
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