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Digital Signal Processing Ultra-low power image processor IC relies on Deeply Depleted Channel transistors SuVolta and Fujitsu Semiconductor have announced what they claim to be the first Deeply Depleted Channel (DDC) transistor-based chip, the MB86S22AA Milbeaut image processor IC. Manufactured on “CS250S” technology, which combines Fujitsu Semiconductor’s 55nm process with DDC technology, the IC boasts 30 percent lower power consumption and roughly twice the processing performance compared to existing products, say the companies. Fujitsu Semiconductor is SuVolta’s first licensee of the DDC technology. Since the collaboration was announced in June 2011, the companies have successfully brought up the DDC technology at the 65nm and 55nm nodes, meeting all production, yield and reliability requirements. MB86S22AA is the latest product in the seventh-generation M-7M series of Milbeaut image processors, aimed at applications ranging from digital SLR cameras to smartphones. It includes features such as a new image processing algorithm with greatly improved optical correction capabilities, faster processing thanks to a newly developed Integrated Image Processor circuit and improved high dynamic range photograph quality using a JPEG-HDR format developed by Dolby Laboratories. In combination, these advances enable roughly double the performance of existing products when processing still images. In terms of video processing, as well, proprietary algorithms make it possible for H.264/AVC compression and decompression on full-HD 30p and 60i video. This makes the new chip suitable for high-resolution, high-performance image processing in digital SLRs and high-end compact digital cameras. SuVolta’s technology has been demonstrated to reduce total power consumption by up to 50 percent while matching the operating speed of the same circuit implemented in conventional transistors or increase operating speed by up to 35 percent while matching the power consumption of conventional designs. It also cuts transistor variability by up to 50 percent, improving memory performance and manufacturability. SuVolta’s technology uses planar, bulk CMOS, it can bring power-performance improvements to CMOS-based logic ICs from 90nm all the way to sub-20nm, as well as DRAM products. Fujitsu Semiconductor jp.fujitsu.com/fsl/en/ JPEG 2000 encoder and decoder cores address multi-channel ultra HDTV Barco Silex has released a range of single-chip, multi-channel 8K UHDTV JPEG 2000 cores, implemented on the 28nm FPGAs and SoCs of Altera and Xilinx. Because they fit into a single FPGA or SoC device, these ultra-high resolution JPEG 2000 cores enable manufacturers to develop future-proofed solutions for UHDTV. Their flexible and scalable architectures give customers a unique upgrade path, ranging from ultra-compact JPEG 2000 HD and DCI cores in the smallest FPGA devices to multi-channel 4K and 8K UHDTV. Barco Silex www.barco-silex.com gies where a human is at the far end, it is still not certain that, after familiarisation with the technology’s behaviour, users will benefit from useful or enjoyable conversations with their devices. Much will depend on the technology’s performance but today’s criteria for measuring speech recognition performance are crude and unlikely to be sufficient to describe the effectiveness of future generations of speech recognition systems. A much broader approach is needed, with consideration given to higher levels of machine intelligence and interaction with the rest of the system and with the cloud. An audio architecture which does not limit or delay next generation improvements will enable these performance leaps to take place much more rapidly, largely unconstrained by hardware and lower-level firmware. It is already possible to build mobile devices with this kind of technology. The standby-mode audio processing capabilities of low power audio hubs are already removing some of the greatest bottlenecks in speech recognition usability. Although the removal of the button-press is an important milestone, it is simply one of many speech recognition enhancements available for mobile platform designs today. By making the right architectural choices during the integration phase, a fully natural communication style can be enabled which can profoundly change the way we use our mobile devices over the next few years. Transcoding engine enables home gateways to stream any content to any device STMicroelectronics has introduced what it claims to be the industry’s first transcoding engine to enable a home gateway to distribute any type of content to any type of connected device in the home. Initially implemented in the STiH416 (‘Orly’) and fully supported in the recently introduced STiH407/STiH410/STiH412 (‘Monaco’) SoCs, the new transcoding engine is set to become an integral part of all of ST’s Home Gateway solutions. The IC leverages the best-of-breed Faroudja de-interlacing and post-processing techniques to convert any digitally encoded stream into any other format suitable for devices that would lack the processing power or memory capacity to handle the data directly. The technology is supported in STMicroelectronics’ chipsets by the company’s software based on the open GStreamer standard. STMicroelectronics www.st.com 42 Electronic Engineering Times Europe October 2013 www.electronics-eetimes.com


EETE OCT 2013
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