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EETE SEP 2015

CoolCube circuit stacking moves to FinFET process By Peter Clarke The CEA-Leti research laboratory at Grenoble France, has reported that its CoolCube 3D interconnect technology is suitable for use with FinFET manufacturing processes as well as with fully-depleted silicon-on-insulator manufacturing processes. The research institute has demonstrated the feasibility of CoolCube used to stack FinFET layers on its 300mm production line. This is particularly relevant to Qualcomm which has previously announced that it would be using a monolithic 3D (M3D) approach to stacking circuits instead of through-silicon vias (TSVs). CEA-Leti’s previous work on CoolCube had been based only on FDSOI. CoolCube is Leti’s sequential integration technology that stacks of active layers of transistors. It is enabled by halving the thermal budget for manufacturing transistors in second and higher layers while minimizing a sacrifice in performance. It also allows about 10,000 times higher density of interconnect than is possible with TSVs. For CoolCube the next layer is produced on a second wafer and then transferred as a thin silicon wafer film peeled off from a wafer blank after planarization. Because the transferred film is so thin and optically transparent, well under a micron (compared to around 50 microns thin for thinned wafers), the new layer of transistors that are processed on top can be aligned to the bottom transistors with lithographic precision. The process is good for stacked ICs as well as for the combination of heterogeneous process layers and the co-integration of sensors, MEMS with CMOS. “In heterogeneous integration, we expect CoolCube to be an actual enabler of smart-sensor arrays by allowing a close integration of sensors, detection electronics and digital signal processing,” said Maud Vinet, Letis advanced CMOS laboratory manager. “In the digital area, we expect this 3D technique to allow a gain of 50 percent in area and 30 percent in speed compared to the same technology generation in classic 2D gains comparable to those expected in the next generation,” she also said. The researchers already reckon that the co-integration of two layers of 14nm technology could create a denser FPGA than a 2D design in 10nm process technology. However that would require a fine-grained redistribution of the design so that memory would be substantially contained in one layer and logic substantially in another. That requires supporting EDA software tools. “We are working with Mentor Graphics and a couple of other EDA firms on that,” said Vinet. The next steps will include: 1) Getting EDA firms to deliver tools to support 3D design with CoolCube; 2) Scaling up production from small test circuits to commercial scale circuits; and 3) Working on customer design, said Vinet. “The target is to intersect the 10nm process node late in 2017, early in 2018” she added. 3D printing for photonics: a British initiative By Julien Happich Researchers at the University of Southampton are set to investigate the use of 3D printing, or additive manufacturing techniques for the fabrication of optical fibres, or at least the complex preforms that they are drawn from. Current techniques used to produce optical fibre preforms, the piece of glass from which an optical fibre is drawn, give a consistent structure along the length of the preform but make it difficult to control the shape and composition of the fibre in 3D. This is the limitation that Professor Jayanta Sahu, together with his colleagues from the University of Southampton’s Zepler Institute and coinvestigator Dr Shoufeng Yang from the Faculty of Engineering and Environment, hope to go past. While today’s micro-structured fibres are made by manually stacking several smaller glass capillaries or canes together to form the preform, the new techniques investigated would rely on the laser sintering of very fine glass powders, layer-by-layer. While discussing this new initiative with EETimes Europe, Professor Sahu admitted he was starting pretty much from scratch. “First, we’ll have to figure out the finesse of the glass powders Silica fibre drawing tower in the Zepler Institute cleanroom complex. and the power level of the lasers used to melt or coalesce the particles during the sintering process in order to achieve optical-grade quality preforms” he said. “Once we’ll have determined the optimum particle size and sintering process, we’ll want to tailor the dopant concentrations during sintering by mixing different doped glass powders to be dispensed by the 3D printer’s nozzles”. But what Sahu finds the most exciting, is the level of precision that could be reached in the full 3D of a preform (instead of today’s only radially assembled preforms with the same longitudinal structure). “First, you could build larger preforms, in excess of 100mm so all the features would scale down to a greater extent when the fibre would be drawn” Sahu explained, “but you could also envisage new built-in optical or photonic functions along the length of the preform” In the long run, the idea would be to build a 3D-printable CAD library of dopant profiles and photonic blocks that designers could use to make special-purpose optical fibres or even photonic chips. The researcher is well aware that numerous challenges lay ahead, including the high melting temperature of the glass (over 2000˚C in case of silica), the need for precise dopant control and refractive index profiles for accurate waveguide geometries. www.electronics-eetimes.com Electronic Engineering Times Europe September 2015 17


EETE SEP 2015
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